An area-efficient 8-bit single-ended ADC with extended input voltage range


Simon Chaput, David Brooks, and Gu Wei. 10/5/2017. “An area-efficient 8-bit single-ended ADC with extended input voltage range.” IEEE Transactions on Circuits and Systems II: Express Briefs, 65, 11, Pp. 1549–1553.


This brief presents an 8-bit successive approximation register analog-to-digital converter (ADC) implemented within a system-on-chip (SoC) for autonomous flapping-wing microrobots. The ADC implements hybrid split-capacitor sub-digital-to-analog converter (DAC) techniques to achieve 35.72% improvement in a capacitor bank energy-area product. The device also implements an extended single-ended input voltage range allowing a direct connection to sensors while maintaining low-power operation. This technique allows 51.7% DAC switching energy reduction compared to the state of the art. The SoC, fabricated in 40-nm CMOS, includes four parallel 0.001 mm 2 1 MS/s ADC cores multiplexed across 13 input ports. It enables 0 to 1.8-V input range while operating off of a 0.9 V supply. At 1 MS/s, the ADC achieves a signal-to-noise and distortion ratio of 45.6 dB for a 1.6-V pp input signal and consumes 10.4 μW.
Last updated on 04/29/2022