Equalizers for high-speed serial links


Hanumolu Kumar, Gu Wei, and Moon Ku. 6/2005. “Equalizers for high-speed serial links.” International journal of high speed electronics and systems, 15, 02, Pp. 429–458. Publisher's Version


In this tutorial paper we present equalization techniques to mitigate inter-symbol interference (ISI) in high-speed communication links. Both transmit and receive equalizers are analyzed and high-speed circuits implementing them are presented. It is shown that a digital transmit equalizer is the simplest to design, while a continuous-time receive equalizer generally provides better performance. Decision feedback equalizer (DFE) is described and the loop latency problem is addressed. Finally, techniques to set the equalizer parameters adaptively are presented.

Last updated on 05/03/2022