Early-stage definition of LPX: A low power issue-execute processor


P Bose, David Brooks, A Buyuktosunoglu, P. Cook, K Das, P Emma, M Gschwind, H Jacobson, T Karkhanis, and P Kudva. 4/1/2003. “Early-stage definition of LPX: A low power issue-execute processor.” Power-Aware Computer Systems, Pp. 89–92. Publisher's Version


We present the high-level microarchitecture of LPX: a low-power issue-execute processor prototype that is being designed by a joint industry-academia research team. LPX implements a very small subset of a RISC architecture, with a primary focus on a vector (SIMD) multimedia extension. The objective of this project is to validate some key new ideas in power-aware microarchitecture techniques, supported by recent advances in circuit design and clocking.

Last updated on 05/04/2022