Early-stage definition of LPX: A low power issue-execute processor
Publication information:
Bose, David Brooks, Buyuktosunoglu, P. Cook, Das, Emma, Gschwind, Jacobson, Karkhanis, and Kudva. 2003. “Early-Stage Definition of LPX: A Low Power Issue-Execute Processor”. Power-Aware Computer Systems, Pp. 89–92
Abstract
We present the high-level microarchitecture of LPX: a low-power issue-execute processor prototype that is being designed by a joint industry-academia research team. LPX implements a very small subset of a RISC architecture, with a primary focus on a vector (SIMD) multimedia extension. The objective of this project is to validate some key new ideas in power-aware microarchitecture techniques, supported by recent advances in circuit design and clocking.