%0 Journal Article %J Communications of the ACM %D 2017 %T Automatically accelerating non-numerical programs by architecture-compiler co-design %A Simone Campanoni %A Kevin Brownell %A Svilen Kanev %A Timothy Jones %A Gu Wei %A David Brooks %X Because of the high cost of communication between processors, compilers that parallelize loops automatically have been forced to skip a large class of loops that are both critical to performance and rich in latent parallelism. HELIX-RC is a compiler/microprocessor co-design that opens those loops to parallelization by decoupling communication from thread execution in conventional multicore architecures. Simulations of HELIX-RC, applied to a processor with 16 Intel Atom-like cores, show an average of 6.85× performance speedup for six SPEC CINT2000 benchmarks. %B Communications of the ACM %I ACM %V 60 %P 88–97 %G eng %U https://dl.acm.org/doi/10.1145/3139461 %N 12