TY - CONF T1 - Empirical performance models for 3T1D memories T2 - ICCD'09: Proceedings of the 2009 IEEE international conference on Computer design Y1 - 2009 A1 - Kristen Lovin A1 - Benjamin Lee A1 - Xiaoyao Liang A1 - David Brooks A1 - Gu Wei AB - Process variation poses a threat to the performance and reliability of the 6T SRAM cell. Research has turned to new memory cell designs, such as the 3T1D DRAM cell, as potential replacement designs. If designers are to consider 3T1D memory architectures, performance models are needed to better understand memory cell behavior. We propose a decoupled approach for collecting Monte Carlo HSPICE data, reducing simulation times by simulating memory array components separately based on their contribution to the worst-case critical path. We use this Monte Carlo data to train regression models, which accurately predict retention and access times of a 3T1D memory array with a median error of 7.39%. JF - ICCD'09: Proceedings of the 2009 IEEE international conference on Computer design PB - IEEE ER -