TY - CONF T1 - HELIX-RC: An Architecture-Compiler Co-Design for Automatic Parallelization of Irregular Programs T2 - International Symposium on Computer Architecture (ISCA) Y1 - 2014 A1 - Simone Campanoni A1 - Kevin Brownell A1 - Svilen Kanev A1 - Timothy Jones A1 - Gu Wei A1 - David Brooks KW - helix AB - Data dependences in sequential programs limit paralleliza- tion because extracted threads cannot run independently. Although thread-level speculation can avoid the need for precise dependence analysis, communication overheads required to synchronize actual dependences counteract the benefits of parallelization. To address these challenges, we propose a lightweight architectural enhancement co-designed with a parallelizing compiler, which together can decouple communication from thread execution. Simulations of these approaches, applied to a processor with 16 Intel Atom-like cores, show an average of 6.85× performance speedup for six SPEC CINT2000 benchmarks. JF - International Symposium on Computer Architecture (ISCA) VL - 42 UR - https://doi.org/10.1145/2678373.2665705 ER -