@inbook {wei2002energy,
	title = {Energy-efficient design of high-speed links},
	booktitle = {Power Aware Design Methodologies},
	volume = {8},
	year = {2002},
	pages = {201{\textendash}239},
	publisher = {Springer, Boston, MA},
	organization = {Springer, Boston, MA},
	abstract = {<p>
	Techniques for reducing power consumption and bandwidth limitations of inter-chip communication have been getting more attention to improve the performance of modern digital systems. This chapter begins with a brief overview of high-speed link design and describes some of the power vs. performance trade-offs associated with various design choices. The chapter then investigates various techniques that a designer may employ to reduce power consumption. Three examples of link designs and link building blocks found in the literature present energy-efficient implementations of these techniques.
</p>
},
	url = {https://doi.org/10.1007/0-306-48139-1_8},
	author = {Gu  Wei and Horowitz Mark and Kim, Jaeka}
}
