@conference {hanumolu20061,
	title = {A 1.6 Gbps digital clock and data recovery circuit},
	booktitle = {IEEE Custom Integrated Circuits Conference 2006},
	year = {2006},
	pages = {603{\textendash}606},
	publisher = {IEEE},
	organization = {IEEE},
	abstract = {A digital clock and data recovery circuit employs simple 3-level digital-to-analog converters to interface the digital loop filter to the voltage controlled oscillator and achieves low jitter performance. Test chip fabricated in a 0.13mum CMOS process achieves BER \&lt; 10 -12 , plusmn1500ppm lock-in range, plusmn2500ppm tracking range, recovered clock jitter of 8.9ps rms and consumes 12mW power from a single-pin 1.2V supply, while operating at 1.6Gbps},
	url = {10.1109/CICC.2006.320829},
	author = {Hanumolu Kumar and Kim, Gyu and Gu  Wei and Moon Ku}
}
