@article {stonick2003adaptive,
	title = {An adaptive PAM-4 5-Gb/s backplane transceiver in 0.25-/spl mu/m CMOS},
	journal = {IEEE Journal of Solid-State Circuits},
	volume = {38},
	year = {2003},
	pages = {436{\textendash}443},
	publisher = {IEEE},
	abstract = {This paper describes a novel backplane transceiver, which uses PAM-4 (pulse amplitude modulated four level) signalling and continuously adaptive transmit based equalization to move 5 Gcb/s (channel bits per second) across typical FR-4 backplanes for total distances of up to 50 inches through two sets of backplane connectors. The paper focuses on the implementation of the equalizer and the adaptation algorithms, and includes measured results. The 17 mm/sup 2/ device is implemented in a 0.25 /spl mu/m CMOS process, operates on 2.5 V and 3.3 V supplies and consumes 1.2 W.},
	url = {https://doi.org/10.1109/CICC.2002.1012844},
	author = {Stonick T and Gu  Wei and Sonntag L and Weinlader K}
}
