@booklet {brooks2004integrated,
	title = {Integrated Architectural Level Power-Performance Modeling Toolkit},
	year = {2004},
	publisher = {DTIC Document},
	abstract = {We are currently developing a robust, integrated infrastructure for studying power-performance issues across a range of systems. \&nbsp;By leveraging a common ISA and shared simulation infrastructure, we will be able to perform apples-to-apples comparisons between processors intended for specific design spaces. \&nbsp;For example, recently there has been significant attention brought to the idea of reusing microprocessor cores in multiple design spaces. \&nbsp;In particular, there has been much interest in exploring the possibility of using multiple low-power, embedded processors in blade systems or SMP-on-a-chip designs for server workloads. \&nbsp;There has also been interest in taking server-class microprocessors and bringing them into use in lower-end systems. \&nbsp;For example, the processor core of the original POWER4 microprocessor has recently been introduced as the PowerPC970 -- a 64-bit microprocessor for use in blade servers and desktop (and potentially laptop) systems. We utilize the MET/Turandot toolkit originally developed at IBM TJ Watson Research Center as the underlying PowerPC microarchitecture performance simulator [3]. \&nbsp;Turandot is flexible enough to model a broad range of microarchitectures and has undergone extensive validation [3]. \&nbsp;In addition, \&nbsp;Turandot has been augmented with power models to explore power-performance tradeoffs in an internal IBM tool called PowerTimer [4]. Turandot is freely available to the research community through licensing arrangements with IBM, and we are currently working with IBM to develop an external, public release of PowerTimer.\&nbsp;},
	author = {David Brooks}
}
