@conference {liang2007architectural,
	title = {Architectural power models for SRAM and CAM structures based on hybrid analytical/empirical techniques},
	booktitle = {Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design},
	year = {2007},
	pages = {824{\textendash}830},
	publisher = {IEEE Press},
	organization = {IEEE Press},
	abstract = {The need to perform power analysis in the early stages of the design process has become critical as power has become a major design constraint. Embedded and high-performance microprocessors incorporate large on-chip cache and similar SRAM-based or CAM-based structures, and these components can consume a significant fraction of the total chip power. Thus an accurate power modeling method for such structures is important in early architecture design studies. We present a unified architecture-level power modeling methodology for array structures which is highly-accurate, parameterizable, and technology scalable. We demonstrate the applicability of the model to different memory structures (SRAMs and CAMs) and include leakage-variability in advanced technologies. The power modeling approach is validated against HSPICE power simulation results, and we show power estimation accuracy within 5\% of detailed circuit simulations.},
	url = {https://doi.org/10.1109/ICCAD.2007.4397367},
	author = {Xiaoyao Liang and Kerem Turgay and David Brooks}
}
