@article {kim2012fully,
	title = {A fully-integrated 3-level DC-DC converter for nanosecond-scale DVFS},
	journal = {Solid-State Circuits, IEEE Journal of},
	volume = {47},
	year = {2012},
	pages = {206{\textendash}219},
	publisher = {IEEE},
	abstract = {On-chip DC-DC converters have the potential to offer fine-grain power management in modern chip-multiprocessors. This paper presents a fully integrated 3-level DC-DC converter, a hybrid of buck and switched-capacitor converters, implemented in 130 nm CMOS technology. The 3-level converter enables smaller inductors (1 nH) than a buck, while generating a wide range of output voltages compared to a 1/2 mode switched-capacitor converter. The test-chip prototype delivers up to 0.85 A load current while generating output voltages from 0.4 to 1.4 V from a 2.4 V input supply. It achieves 77\% peak efficiency at power density of 0.1 W/mm 2 and 63\% efficiency at maximum power density of 0.3 W/mm 2 . The converter scales output voltage from 0.4 V to 1.4 V (or vice-versa) within 20 ns at a constant 450 mA load current. A shunt regulator reduces peak-to-peak voltage noise from 0.27 V to 0.19 V under pseudo-randomly fluctuating load currents. Using simulations across a wide range of design parameters, the paper compares conversion efficiencies of the 3-level, buck and switched-capacitor converters.},
	url = {https://doi.org/10.1109/JSSC.2011.2169309},
	author = {Wonyoung Kim and David Brooks and Gu  Wei}
}
