Publications

187 entries « 4 of 4 »

2004

Victor Zyuban; David Brooks; Viji Srinivasan; Michael Gschwind; Pradip Bose; Philip N. Strenski; Philip G. Emma

Integrated analysis of power and performance for pipelined microprocessors Journal Article

Computers, IEEE Transactions on, 53 (8), pp. 1004–1016, 2004.

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Yingmin Li; David Brooks; Zhigang Hu; Kevin Skadron; Pradip Bose

Understanding the energy efficiency of simultaneous multithreading Inproceedings

Proceedings of the 2004 international symposium on Low power electronics and design, pp. 44–49, ACM 2004.

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Kim Hazelwood; David Brooks

Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization Inproceedings

Proceedings of the 2004 international symposium on Low power electronics and design, pp. 326–331, ACM 2004.

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Mark Hempstead; Matt Welsh; David Brooks

TinyBench: The case for a standardized benchmark suite for TinyOS based wireless sensor network devices Inproceedings

Local Computer Networks, 2004. 29th Annual IEEE International Conference on, pp. 585–586, IEEE 2004.

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David Brooks; Pradip Bose; Margaret Martonosi

Power-performance simulation: design and validation strategies Journal Article

ACM SIGMETRICS Performance Evaluation Review, 31 (4), pp. 13–18, 2004.

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Yingmin Li; K Skadron; Z Hu; D Brooks

Evaluating the thermal efficiency of SMT and CMP architectures Journal Article

IBM TJ Watson Conference on Interaction between Architecture, Circuits, and Compilers, 2004.

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Yau Chin; John Sheu; David Brooks

Evaluating techniques for exploiting instruction slack Inproceedings

Computer Design: VLSI in Computers and Processors, 2004. ICCD 2004. Proceedings. IEEE International Conference on, pp. 375–378, IEEE 2004.

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David Brooks

Integrated Architectural Level Power-Performance Modeling Toolkit Technical Report

DTIC Document 2004.

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2003

David Brooks; Pradip Bose; Vijayalakshmi Srinivasan; Michael K Gschwind; Philip G Emma; Michael G Rosenfield

New methodology for early-stage, microarchitecture-level power-performance analysis of microprocessors Journal Article

IBM Journal of Research and Development, 47 (5.6), pp. 653–670, 2003.

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Russ Joseph; David Brooks; Margaret Martonosi

Control techniques to eliminate voltage emergencies in high performance processors Inproceedings

High-Performance Computer Architecture, 2003. HPCA-9 2003. Proceedings. The Ninth International Symposium on, pp. 79–90, IEEE 2003.

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P Bose; D Brooks; A Buyuktosunoglu; P Cook; K Das; P Emma; M Gschwind; H Jacobson; T Karkhanis; P Kudva; others

Early-stage definition of LPX: A low power issue-execute processor Journal Article

Power-Aware Computer Systems, pp. 89–92, 2003.

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Pradip Bose; D Brooks; P Emma; M Gschwind; Vijayalakshmi Srinivasan; P Strenski; Victor Zyuban

Integrated analysis of power and performance for pipelined microprocessors Journal Article

IBM Research Report RC22913, IBM TJ Watson Research Center, Yorktown Heights, NY, 2003.

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2002

Viji Srinivasan; David Brooks; Michael Gschwind; Pradip Bose; Victor Zyuban; Philip N Strenski; Philip G Emma

Optimizing pipelines for power and performance Inproceedings

Microarchitecture, 2002.(MICRO-35). Proceedings. 35th Annual IEEE/ACM International Symposium on, pp. 333–344, IEEE 2002.

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Alper Buyuktosunoglu; David H Albonesi; Stanley Schuster; David Brooks; Pradip Bose; Peter Cook

Power-efficient issue queue design Inproceedings

Power aware computing, pp. 35–58, Kluwer Academic Publishers 2002.

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M Martonosi; D Brooks; V Tiwari

Architecture-level power modeling with Wattch Journal Article

Computer, 35 (2), pp. 64–64, 2002.

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2001

David Brooks; Margaret Martonosi

Dynamic thermal management for high-performance microprocessors Inproceedings

High-Performance Computer Architecture, 2001. HPCA. The Seventh International Symposium on, pp. 171–182, IEEE 2001.

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Alper Buyuktosunoglu; Stanley Schuster; David Brooks; Pradip Bose; Peter Cook; David Albonesi

An adaptive issue queue for reduced power at high performance Journal Article

Power-Aware Computer Systems, pp. 25–39, 2001.

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Alper Buyuktosunoglu; David Albonesi; Stanley Schuster; David Brooks; Pradip Bose; Peter Cook

A circuit level implementation of an adaptive issue queue for power-aware microprocessors Inproceedings

Proceedings of the 11th Great Lakes symposium on VLSI, pp. 73–78, ACM 2001.

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David Brooks; Margaret Martonosi; John-David Wellman; Pradip Bose

Power-performance modeling and tradeoff analysis for a high end microprocessor Journal Article

Power-Aware Computer Systems, pp. 126–136, 2001.

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Margaret Martonosi; David Brooks; Pradip Bose

Modeling and analyzing CPU power and performance: Metrics, methods, and abstractions Journal Article

SIGMETRICS 2001/Performance 2001-Tutorials, 2001.

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Russ Joseph; David Brooks; Margaret Martonosi

Live, runtime power measurements as a foundation for evaluating power/performance tradeoffs Journal Article

Workshop on Complexity Effectice Design WCED, held in conjunction with ISCA, 28 , 2001.

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Pradip Bose; Margaret Martonosi; David Brooks

Modeling and Analyzing CPU Power and Performance: Metrics, Methods, and Abstractions Journal Article

Tutorial, ACM SIGMETRICS, 2001.

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David Michael Brooks; Margaret Adviser-Martonosi

Design and modeling of power-efficient computer architectures Journal Article

2001.

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2000

David Brooks; Vivek Tiwari; Margaret Martonosi

Wattch: a framework for architectural-level power analysis and optimizations Inproceedings

ACM SIGARCH Computer Architecture News, pp. 83–94, ACM 2000.

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David M Brooks; Pradip Bose; Stanley E Schuster; Hans Jacobson; Prabhakar N Kudva; Alper Buyuktosunoglu; J Wellman; Victor Zyuban; Manish Gupta; Peter W Cook

Power-aware microarchitecture: Design and modeling challenges for next-generation microprocessors Journal Article

Micro, IEEE, 20 (6), pp. 26–44, 2000.

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David Brooks; Margaret Martonosi

Value-based clock gating and operation packing: dynamic strategies for improving processor power and performance Journal Article

ACM Transactions on Computer Systems (TOCS), 18 (2), pp. 89–126, 2000.

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David Brooks; Margaret Martonosi

Adaptive thermal management for high-performance microprocessors Inproceedings

In Workshop on Complexity Effective Design, Citeseer 2000.

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Margaret Martonosi; Vivek Tiwari; David Brooks

Wattch: A framework for architectural-level power analysis and optimizations Journal Article

isca, pp. 83, 2000.

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1999

David Brooks; Margaret Martonosi

Dynamically exploiting narrow width operands to improve processor power and performance Inproceedings

High-Performance Computer Architecture, 1999. Proceedings. Fifth International Symposium On, pp. 13–22, IEEE 1999.

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David Brooks; Margaret Martonosi

Implementing application-specific cache-coherence protocols in configurable hardware Journal Article

Network-Based Parallel Computing. Communication, Architecture, and Applications, pp. 181–195, 1999.

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1998

Christina Leung; David Brooks; Margaret Martonosi; Douglas W Clark

Power-Aware Architecture Studies: Omgoing Work at Princeton Journal Article

Power-Driven Microarchitecture Workshop, 1998.

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Xiaoyao Liang; Gu-Yeon Wei; David Brooks

Combating process variations Journal Article

0000.

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VJ Reddi; D Brooks; RF Circuits; S Mukherjee; P Dasgupta; S Mukhopadhyay

Resilient Architectures via Collaborative Design: Maximizing Commodity Processor Performance in the Presence of Variations Journal Article

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Vijay Janapa Reddi; Meeta Gupta; Glenn Holloway; Michael D Smith; Gu-Yeon Wei; David Brooks

Voltage emergency prediction Journal Article

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Pradip Bose; David M Brooks; Viji Srinivasan; Philip G Emma

Power-Performance and Power Swing Characterization in Adaptive Microarchitectures Journal Article

0000.

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Yakun Sophia Shao; Judson Porter; Michael Lyons; Gu-Yeon Wei; David Brooks

Power, Performance and Portability: System Design Considerations for Micro Air Vehicle Applications Journal Article

0000.

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Hyoun Kyu Cho; Scott Mahlke; Farrukh Hijaz; Qingchuan Shi; Omer Khan; Mostafa Farahani; Amirali Baniasadi; Dr Michigan; Ron Dreslinski; Ram Krishnamurthy; others

Workshop on Near-threshold Computing (WNTC) Journal Article

0000.

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187 entries « 4 of 4 »