Efficient On-Chip Power Delivery
Integrated voltage regulators
Traditional power delivery systems use off-chip voltage regulators to generate the required supply voltage and currents, but the power delivery network (PDN) that connects them to the chip itself must pass through the PCB, package pins, and C4 pads. This results in significant parasitic effects that must be accounted for in the design of the PDN. These effects are further compounded when designing independent voltage regulators to create separate voltage domains on a chip for fine-grained DVFS. This motivates the need for efficient, fully integrated voltage regulators (IVRs). IVRs are typically much less power-efficient and exhibit greater variability due to process variation. We investigate techniques to improve on-chip voltage conversion and evaluate performance of IVRs in a system to determine whether their benefits can outweigh their drawbacks in a whole system.
People: Tao Tong, Xuan “Silvia” Zhang, Mario Lok
- A Fully Integrated Battery-Connected Switched-Capacitor 4:1 Voltage Regulator with 70% Peak Efficiency Using Bottom-Plate Charge Recycling. In: IEEE Custom Integrated Circuits Conference (CICC), 2013.
- Supply-Noise Resilient Adaptive Clocking for Battery-Powered Aerial Microrobotic System-on-Chip in 40nm CMOS. In: IEEE Custom Integrated Circuits Conference (CICC), 2013.
- Design and analysis of an integrated driver for piezoelectric actuators. In: IEEE Energy Conversion Congress and Exposition, 2013.
Flexible voltage stacking
Power consumption and delivery have emerged as a major challenge facing modern computing systems from mobile to server applications. Aggressive architecture and circuit techniques to reduce and manage power has led to increase in chip’s current draw, causing increased voltage noise and inefficiency in the power delivery system. This is exacerbated by the fact that while transistors are scaling aggressively towards the nano-scale, the off-chip environment has not scaled. Flexible Voltage Stacking offers an alternative method to power delivery that can simplify the power delivery system and alleviate the inefficiencies. This project investigates voltage stacking in the context of chip multiprocessors, investigating architecture and circuit techniques to enable multiple voltage domains while only requiring a single voltage regulator by stacking voltages in a flexible way.
People: Sae Kyu Lee
- Evaluation of voltage stacking for near-threshold multicore computing. In: IEEE International Symposium on Low Power Electronics and Design, 2012.